I'm not completely confident that I am understanding their claim, but I will risk a comment anyway. There is one obvious question that comes to me and doesn't appear to be directly addressed in the paper.
Here's the key figure showing their system:
It is a little cantilever which can be pulled about the same amount by two electrodes, which are the gates, and when both electrodes are on it is pulled around 1.5x as much. Then they say that if you set the digital logic threshold just above the position when it's not being pulled, it is an OR gate.
Formally this is true, but in reality you can't just tell your circuit "this is the threshold, and you are to regard these two signals as identical." You have to have something else that actually takes those two different outputs and has the same reaction to either of them. This is the step that would require some sort of erasure and be subject to Landauer heating.
As such, it seems to be that if you tried to scale this type of gate up you would end up with a dilemma:
Either you maintain the condition of having many physical states correspond to a logical state, which seems like it would quickly become infeasible because your range of inputs that you accept as a "1" would have to grow (in this case, roughly linearly) with the number of bits. For a modern microprocessor, this would mean accepting a signal that varied over 9 orders of magnitude.
Or, at some point you consolidate all of the physical states corresponding to a logical "1" to the same output, and pay the cost of Landauer heating for erasure.
Of course, this does not preclude this sort of reversible digital scheme from having some sort of specialized application at a smaller scale. not to mention its utility in clarifying exactly what the Landauer limit really does and does not say. But for a scalable computer, I'm not sure that the claims they make are really justified.