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Let us consider a MOS (metal oxide semiconductor FET) system. Now the threshold voltage of aluminium of the gate of such a FET of 4.1 eV and that of the silicon oxide layer is different.

My book claims that due to the threshold voltage difference, a voltage difference is created which is termed as the built in voltage. However, I cannot find a plausible explanation for this voltage difference. I hope the learned members here can help.

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A voltage difference is created whenever two differently doped materials conduct. It may not seem like these will conduct, but since electrons and holes can move around, current can flow (at least to a limited extent).

We have two charge carriers, which both play a role. Lets focus on the extra electrons in the "n region". They will try to diffuse to the p region, since the concentration is lower, but will soon be opposed by the voltage created form all the electrons piling up in the n region. Equilibrium is established when the voltage balances the diffusive "force", and a very small fraction of the electrons has to move.

Built in voltage is the voltage created when a p-doped and n-doped semiconductor are placed in contact.

Why can't we extract perpetual energy from this free voltage? To do so would require a complete circuit, in which the electrons flow from the p region, through your wires, and back to the n region. The voltage gradient is "downhill", but the concentration gradient is "uphill" (since the n regions has so many more electrons). The downhill and uphill terms cancel and no current will flow.

We focused on the electrons, but holes also contribute. The picture is similar but more complicated.

As to this "built in voltage" will create an equal difference in the the FET threshold voltage, I am not sure.

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Kevin is right. Here's what happens when the junction is in dynamic equilibrium:

junction

When the two junctions are placed together the diffused electrons come into contact with holes on the P-side and are eliminated by recombination. Likewise for the diffused holes on the N-side. The net result is the diffused electrons and holes are gone, leaving behind the charged ions adjacent to the interface in a region with no mobile carriers (called the depletion region). The uncompensated ions are positive on the N side and negative on the P side. This creates an electric field that provides a force opposing the continued exchange of charge carriers. When the electric field is sufficient to arrest further transfer of holes and electrons, the depletion region has reached its equilibrium dimensions. Integrating the electric field across the depletion region determines what is called the built-in voltage (also called the junction voltage or barrier voltage or contact potential).

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What they're referring to is work function. Although work functions technically apply for surfaces of materials in vacuum, they also work within reason for insulating dielectric materials.

The threshold voltage required to turn on the inversion layer a MOS structure depends on the material of the gate. When the device is at equilibrium, it actually prefers to have a small electric field inside the insulator and hence a small default surface charge inside the semiconductor and gate. This electric field depends on the difference of work function between the gate material and semiconductor.

It may seem surprising that a device would prefer to have a built-in electric field, but recall that PN junctions also have built-in electric fields (see other answers). In general any surface or interface can have a built-in electric field.

Sze talks about this gate work function effect a bit (Physics of semiconductor devices 3rd ed, page 225-226 / Chapter 4 figures 20-22).

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