I'm trying to understand why is there a voltage drop when a diode is in a forward bias. From what I understood the PN-junction creates a potential barrier of about 0.7 V for silicon. Now looking at the circuit below, if we choose to integrate in the path of conventional current, it would seem that the electric field of the PN-junction would increase the voltage because of ΔV = -∫E.ds. But that would result in a voltage rise, not a voltage drop. So is there a field created by charge accumulating at the surface of the diode? And if so why would this electric field be bigger than the electric field of the junction in such a way that it would create a voltage drop of approximately 0.7 V. Is it because of the internal resistance of the diode?
If we measure the voltage between the terminals of a diode in an open circuit, the outcome is zero. The E-field of the junction in only internal.
When a forward voltage is applied, but there is also a big resistance in series in the circuit, there is a tension between the ends of the diode but below 0.7V. Even below the threshold a small current flows.
When we decrease the resistance in series, the current increases, and the voltage in the diode also increases. When the threshold is reached, it stays there for further increase of current.
The model of ohmic resistance for diodes is misleading because, as can be seen from the example above, their behaviour is highly non-linear.
What happens is that the junction is a potential barrier, that once overcome, allows current as a conductor, but different from a conductor, requiring a voltage to keep passing the barrier.