I can't wrap my head around the circumstance that, somewhen when I increase $ V_{DS} $ the current $ I_{DS} $ will remain constantly. Why is that?
https://www.electronics-tutorials.ws/amplifier/mosfet-amplifier.html
$\begingroup$
$\endgroup$
3
-
$\begingroup$ Would Electrical Engineering be a better home for this question? $\endgroup$– Qmechanic ♦Commented Jan 20, 2021 at 16:55
-
1$\begingroup$ Maybe modes of operation will help. $\endgroup$– Agnius VasiliauskasCommented Jan 20, 2021 at 16:57
-
$\begingroup$ @Qmechanic I'm interested in the (physical) reasons of that behaviour $\endgroup$– BenCommented Jan 20, 2021 at 18:23
Add a comment
|
1 Answer
$\begingroup$
$\endgroup$
9
For concreteness, consider an n-channel enhancement mode MOSFET whose source terminal is connected to the body. If $V_{DS}=0$ and $V_{GS}>V_{th}$, a conducting channel is opened between the drain and source. When $V_{DS}$ is increased, current flows across the channel.
However, increasing $V_{DS}$ has another effect - it changes the charge distribution on the gate. When the source voltage is higher than the drain voltage, the positive charge which was initially (more or less) evenly distributed across the gate gets pushed toward the drain side. This has the effect of making the conducting channel asymmetric - wider near the drain and narrower near the source.
If $V_{DS}$ exceeds $V_{GS}-V_{th}$, then the channel will be closed near the source region. This is referred to the pinch-off regime. Past this point, increasing $V_{DS}$ causes a proportional increase in resistance because the channel closes off even further away from the source region. As a result, the current does not appreciably increase as $V_{DS}$ increases. This is why the current saturates.
The current does increase with changes in $V_{GS}$, however, and the increase can be quite dramatic. That's why amplifiers operate in this regime - a signal on the $V_{GS}$ terminal produces a current signal $I_{DS}$.
answered Jan 20, 2021 at 17:01
-
$\begingroup$ Thank you very much! How exactly do I have to understand "when source voltage is higher than drain voltage"? How can they be different when it is about V_DS? Another aspect towards V_GS - V_th: Isn't V_th fixed? $\endgroup$– BenCommented Jan 20, 2021 at 18:22
-
$\begingroup$ @Ben (1) $V_{DS}$ is the voltage between the source and drain. If the source and drain are at the same potential, then $V_{DS}=0$. (2) Yes $\endgroup$ Commented Jan 20, 2021 at 18:26
-
$\begingroup$ Sorry for my pedantry but then it should be "when source potential is higher..". Is there a difference if the potential from Drain is higher or from Source? I need to ask anything which is unclear as I try to understand all this for some hours meanwhile... $\endgroup$– BenCommented Jan 20, 2021 at 18:43
-
1$\begingroup$ @Ben In the small region where the channel is pinched off, the electric field is very high, so electrons can still be pulled through it. $\endgroup$ Commented Jan 20, 2021 at 19:46
-
1$\begingroup$ @Ben It is removed. When $V_{DS}\neq 0$, the potential varies across the length of the channel. When $V_{DS}>V_{GS}-V_{th}$, then there will be a region near the drain where the potential difference between the gate and the body is less than $V_{th}$, which means that the conducting channel will not form. Note that the pinched-off region has no mobile charge carriers of its own, but it does not prevent charge carriers from passing through it. $\endgroup$ Commented Jan 21, 2021 at 12:21