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Consider the following circuit:

enter image description here

A textbook problem[2] asks to find the resistance $R$ such that the power dissipated in $R$ is maximized (assuming $R_1$ and $R_2$ are fixed).

I found that $R$ should be equal to the equivalent resistance of $R_1$ and $R_2$, were they in parallel. This is a simple enough result that it seems it might have some intuitive explanation that doesn't require calculation. Is there one?

[2]: Halliday, David, Robert Resnick, and Kenneth S. Krane. Physics, 5ed. vol. 2. Wiley, 2001. Exercise 31-24

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The brief summary (which is really just a restatement of the mathematics you've been exploring) is that for a source with an internal resistance feeding into a load,

  • We minimize the load to maximize the current transfer (but there'll be no voltage across this load).
  • We maximize the load to maximize the voltage transfer (but there'll be no current through this load).
  • We set the load equal to the source resistance to maximize the power transfer.

Thus, a symmetric arrangement obtains, in a sense, a happy medium between an output stage that carries no voltage and one that carries no current.

These relationships have profound effects on the design of circuits that aim to maximize the efficiency as defined in some specific way; see here for more discussion of impedance matching for maximum power transfer.

In my own engineering experience, I worked on a microfabricated device containing an array of hermetic metal seals that could be ruptured from an applied current—similar to a fuse. Here, I wished to maximize the heat dissipated in the metal seal or cap or membrane (p. 63 here), so for maximum efficiency (the device was to be implanted in the human body for years with a battery), it was necessary to (1) reduce the source resistance as much as possible, which included the battery resistance, PC board resistance, wirebond resistance, and trace resistance on the microfabricated chip, and then (2) design the membrane so that its resistance would match the sum of all other resistances. These aims required the deposition of relatively thick (2 µm) gold traces on the chip and then a switch to a platinum and titanium composite for the membrane—even though Pt and Ti have much higher melting temperatures than Au:

enter image description here

The ultimate resistances were just a few ohms each for the source and the load.

This is, of course, just one of myriad examples, but it may help build intuition by providing practical values in an actual application.

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Impedance matching for highest dissipated power is bread-and-butter of designing amplifiers, antennas, oscillator circuits, etc. For lumped element circuits the derivation is easiest when the RLC circuit is represented by its Thevenin or Norton equivalent in which case the load is to be matched to single source impedance attached to either a voltage or a current source. While formally it is quite easy to show that the highest power is absorbed by the load when its impedance is the complex conjugate of the source impedance, i.e., the load and source (Thevenin or Norton) resistances are equal while the reactances are of opposite sign its meaning is obscured by the derivation.

I think the physical meaning is evident only in the traveling waves picture.

Staying with the case of a Thevenin or Norton equivalent source with resistive internal impedance, imagine that your load is attached to the circuit via transmission line whose wave impedance is equal to the source impedance. Now if your load resistance is different from that of the line's wave impedance then the incident wave traveling from the source to the load will suffer a reflection that will be completely absorbed by the source resistance since the source side is matched. For unit incident power the amount reflected from the load is of course $|\Gamma_L|^2$ where reflection coefficient $\Gamma_L= \frac{R_{load} - R_0}{R_{load} + R_0}$ and $R_0=R_{source}=R_{wave}$ and this result is independent of the length of the transmission line! There will be a standing wave on the line but the delivered power depends only on $\Gamma_L$. If $\Gamma_L = 0$ that is $R_{load}=R_0$ then there will be no reflected wave from the load and all incident power leaving the source will be absorbed by the load. This is because the input impedance of the line when the load resistance is equal to the wave impedance is always the wave impedance independently of the line's length.

This concept can be further elaborated and formalized even for non-resistive (complex) impedance loads and sources, and is the basis of the scattering matrix formalism for lumped element circuits and their design.

A somewhat more hand-waving argument is that you imagine an isotropic antenna surrounded by an absorbing sphere whose wall impedance (in the radial direction) is $\sqrt{\frac {\mu_0}{\epsilon_0}} =120\pi = 377 \Omega $. This is a perfect match, all waves emitted form the isotropic source is uniformly absorbed by the sphere and nothing is reflected. Now make a hole on the wall and patch it up with some material. If the impedance of that material is anything but $377\Omega$ then it will reflect because the ratio of the E and H in the incident wave is not the same as on the patch. Since you cannot have more power absorbed than what is incident the highest absoprtion is when there is no reflection, hence the match.

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This is a simple enough result that it seems it might have some intuitive explanation that doesn't require calculation.

In the circuit given, the equivalent resistance seen by the load $R$ is $R_{eq} = R_1||R_2$. For a Thevenin (Norton) equivalent circuit, this equivalent resistance is in series (parallel) with the load.

The power $P_R$ delivered to $R$ is maximum when $P_R = P_{R_{eq}}$. Is there an intuitive way to see why this is?

Choose the Thevenin equivalent picture ($R_{eq}$ is in series with $R$). The power delivered to $R$ is quadratic in the series current through

$P_R = I^2R,\quad I = \frac{V_{th}}{R_{eq} + R}$

where $V_{th}$ is the Thevenin source voltage ($V_{th} = V\frac{R_2}{R_1 + R_2}$ in the circuit given but this is irrelevant to the result)

It's easy to see from this that $P_R$ goes to zero in the limits $R \rightarrow 0$ and $R \rightarrow\infty$ so there is a maximum for some finite $R$.

The question is then: what value of $R$ would one intuitively expect to give the maximum power? I think there's a reasonable case that it's $R = R_{eq}$ because, in that case, $P_R = P_{R_{eq}}$. Think about it this way:

(1) increasing $R$ above $R_{eq}$ means that $P_R$ is getting relatively larger but the total power is decreasing

(2) decreasing $R$ below $R_{eq}$ means that $P_R$ is getting relatively smaller but the total power is increasing

One might then 'intuit' that $P_R = P_{R_{eq}}$ is a critical point.

I think a similar intuition informs us that maximizing the area of rectangle when the sum $L + W$ is held constant requires that $L = W$.

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