How does annealing improves the ohmic contact? Suppose we have a p-type material and metal contacts deposited taking the work function of a metal and semiconductor into account. At room temperature (depending on the doping level) they might now show non-linear IV curve (non-ohmic behavior). How does annealing at higher temperature improves the ohmic contacts and eventually become ohmic? Is there a way to calculate at which temperature to expect the transition?
 A: There are three basic ways that annealing or more correctly, heating improves an ohmic contact:

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*The first method introduces a heavily doped layer immediately below the metal semiconductor junction.  This heavily doped layer results in a very narrow barrier through which electrons can easily tunnel.  The requirement to produce this type of metal-n++ or metal-p++ junction is that the metal itself contain the needed dopant.  So, for example, AuGe is used as an n-type contact to GaAs and will make an ohmic contact to even a low-doped substrate.  The formation occurs between 350 to 450 C.  The germanium in the AuGe eutectic diffuses into the GaAs (a few nanometers at most) and preferentially replaces Ga atoms with Ge atoms (the Au in the film getters the Ga to a few tenths of a percent).  Ge has one more electron so this is effectively doping the GaAs heavily n-type.  This is true annealing.


*The second method is more appropriately called sintering rather than annealing and the temperature range is wider, 250-500C.  In this method the metal itself cleans up a previously contaminated interface.  The prototypical example of this is titanium on almost any semiconductor that is prone to slight oxidation.  For example, a pure titanium film sputtered onto a GaAs surface may not produce an ohmic contact because the GaAs had been slightly oxidized before metal deposition.  A short 250 C sintering step will markedly improve the contact resistance.  The titanium is actually tearing away oxygen atoms from the interface.  They get incorporated a few nm into the Ti but not enough to form a TiO layer.  The caveat is that this method doesn't introduce any extra dopant so the semiconductor layer beneath the metal must be heavily doped beforehand.


*In silicon there is a third choice but is essentially equivalent to choice 2 above.  Silicon forms a silicide with many metals in the range of 300-500C.  Forming a silicide creates a new, clean metal semiconductor interface (some of the substrate silicon is chewed up) that usually provides a better ohmic contact.  This works in a way similar to oxide formation on the silicon surface to clean up an oxide-silicon interface.
A: Annealing at low temperatures, and in a reducing gas (typically H2:Ar and at times with plasma) will reactively etch or remove the oxide interface at the contact. High temperature annealing >800-900C in an inert atmosphere can accomplish a similar task, but is often unused due to thermal diffusion constraints on the transistor.
