# Wavelength used in manufacturing of integrated circuits (IC)

How is it that the silicon ICs industry can burn ICs of a dozen nanometers using photolytography with UV laser of about 193 nanometers?

Since the gates are smaller than the wavelength, for example 22 nm, the mask would filter/diffract the light, right?

It is true that older litography used a more simple approach with a light source and a mask, but as you note, today structures much smaller than the wavelength of the illuminating light can be etched on the IC.

There are a huge number of techniques involved to improve on this, and I'm just an interested observer in this, but I would say that phase-shift masks (PSMs), where the wave properties of light are actually used for us instead of against us, is what answers your question and context best.

If you design a mask, not just as a silhouette of what you're trying to etch, but with, for example, varying transparent thicknesses, you can modulate the wave interference of the light passing through it and create much sharper structures in the etch than you could have done when using it as a simple shadow mask.

In the illustration below, the leftmost picture shows what you get with a simple shadow mask, and the three other pictures show various PSM techniques where the wave interference of the transmitted light create sharper details on the etch.

This review article summarizes a lot of the PSM techniques and has some nice illustrations and electron microscope photos.

Furthermore, the combination of clever arrangements of photoresists, multiple exposures and etching techniques enable even higher resolutions of the final patterns. As a very simple example, if you design a photoresist process that produces lines in the target for both deeply exposed and unexposed peaks, you get two actual lines of half width for each dark/light band your mask transmits. There are a lot of illustrations of this on the Wikipedia page for multiple patterning.

Note that it's no longer a general procedure where the designer can simply design a pattern which is smaller and get it etched perfectly using the PSM, optical proximity correction (OPC) and other methods. The price you pay for getting smaller features is a much more complicated ruleset and design process on the pattern. I guess the benefits are best exploited in heavily repeated structures, where a small pattern can be super-optimized for this, such as in memory chips. Flash-memory (storage for SSDs, SD cards, etc.) is one of the first categories of ICs that always get the new and updated process shrinks.

Well, this was an extremely superbrief summary of a multi-multi billion dollar R&D field :)

• Another really simple trick they do is they slow down light. Its called immersion lithography. For example, doing the photolithography underwater, you achieve an effective wavelength of ~2/3 of the actual (free space) wavelength. – Aron Jan 10 '15 at 13:06

You can't pattern 22 nanometer half pitch structures with an 1.35 numerical aperture immersion stepper with 193 nanometer UV laser light. The pattern has to go through the optics of the stepper, hence $A_\pm(x):=\exp(\pm 2\pi i\frac{NA}{\lambda}x)$ are the modes of the highest possible spatial frequency in x-direction in the amplitude distribution, and $|A_+-A_-|^2=|A_+|^2+|A_-|^2-2\Re(A_+A_-^*)=2-2\Re(\exp(2\pi i\frac{2NA}{\lambda}x))=2-2\cos(2\pi \frac{2NA}{\lambda}x)$ is an intensity distribution with the highest possible spatial frequency in x-direction. So the smallest possible pitch of a periodic structure is $\frac{\lambda}{2NA}=193 \text{ nanometer}/(2*1.35)=72 \text{ nanometer}$.

Even achieving this physical limit will be challenging, but a combination of phase shift mask technology, oblique illumination technique and optical proximity correction against a stable calibrated process including the chemically amplified photoresist might get you close, as long as you only have 1D x-oriented lines and spaces structures. If you have true 2D structures, or both x- and y-oriented lines and spaces, don't even dare to dream that you will get close to this limit.

Just pause for a moment to feel the disconnect between a 72 nanometer pitch and a 22 nanometer structure. OK, the 22 nanometer was supposed to be the half pitch, so we are effectively talking about a periodic structure with a 44 nanometer pitch here. But this still leaves a huge gap between a theoretical pitch limit of 72 nanometers, and a "claimed" pitch of 44 nanometers. Here the infamous double patterning comes into play, allowing you to half the hard physical pitch limit, at the expense of multiple exposures, and additional chemical processing steps. Since $72 / 2 = 36 < 44$, the "requested task" is at least no longer strictly impossible.

However, double patterning is really expensive, because you add multiple additional processing steps, and need multiple masks. And if your design process is not compliant with a self-aligned double patterning process, then you have extremely high alignment requirements. So even if you use double patterning, you want to limit the number of layers that need double patterning to the absolute minimum.

This is where the help of the marketing department is most appreciated. Even so it says "The typical half-pitch (i.e., half the distance between identical features in an array) for a memory cell using the process is around 22 nm" in wikipedia's 22 nanometer article, I still remember the first time I saw an actual layout for a "metal 1" layer of a certain node. I asked back whether they mistakenly gave me a layout from an older node, because all the structures where so "big" compared to what I expected based on the node name. Then somebody told me that the 90 nanometer node was the last one where the naming still meant "half pitch" for a memory cell, and that the node names just get divided by 1.4 every two years, independent of the actual structure sizes and memory cell pitches. And since we are stuck at 193 nm wavelength since quite a long time...

More important than the actual structure sizes is that the price per transistor halves every two years. But even this has probably ended now, see the reaction of the audience as Chris Mack announced that Moore's law is over at SPIE 2014.

Even so there are nice presentations about multiple patterning and phase shift mask technologies, the role of the chemically amplified photoresist should not be underestimated. The trick here is to use light to produce an acid, which acts as a catalyst. The photoresist is loaded with a base, which directly neutralizes any acid produced, as long as the amount of acid doesn't exceed the level of base loading. This gives the photoresist a sort of threshold like behavior for converting intensity distributions into resist profiles.

But the chemical amplified photoresist is challenging for the optical proximity correction, because a more or less "correct" modeling would require to solve a coupled reaction-diffusion equation like

$\frac{\partial}{\partial t}a=D_a\frac{\partial^2}{\partial x^2}a-k_n ab$

$\frac{\partial}{\partial t}b=D_b\frac{\partial^2}{\partial x^2}b-k_n ab$

$\frac{\partial}{\partial t}c = a$

This equation is easy to solve "correctly" for a small area, but it's just too expensive to do this "full chip". So instead of a "correct" photoresist model, empirical models with many fit parameters are used, which are calibrated against measured data from the actual process. The optical proximity correction is an extremely computational costly process for todays chips. Compute clusters of many hundreds nodes working for more than half a day for a single layer is standard, and if you are not careful, you can easily block a compute cluster for multiple days.

Alternative patterning technologies (157 nanometer lithography, EUV lithography, nanoimprint, ebeam direct write, ...) are developed by different parties in the hope to replace 193 nanometer immersion lithography at some point, but often they are killed just in the moment where the research phase is finished successfully, and ...

In the multi-beam direct-write segment, multiple sources indicate that KLA-Tencor is exiting this market. Officials from KLA-Tencor declined to comment.

[...]

KLA-Tencor, meanwhile, has been developing Reflective Electron Beam Lithography (REBL), which was originally funded by DARPA. In fact, DARPA poured over \$100 million in funding into the REBL program.

KLA-Tencor was able to develop an alpha tool, based on the REBL concept. At the recent SPIE conference, the company reported some impressive results. The key to the technology is a CMOS-based digital pattern generator module, which enables more than 1 million beams at full current. Reports of its exit from this market leave its development efforts in question.