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According to the formula of a $parallel$ $plate$ capacitor...

$C$ $=$ $\dfrac{\epsilon_0 A}{d}$

The thinner the capacitor, more the charge it will be able to store...

And hence the graph should somewhat look like (excluding the negative part):

C versus 1/d

So if we keep on decreasing the distance between the two plate the C should increase... But how small the d can practically be???

It cannot be in nanometres or something like that...

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    $\begingroup$ Gate dielectrics for modern CMOS devices are in the few nanometer thicknesses. Since these are (functionally) capacitors, d can certainly be small. But, high-k dielectrics had to be introduced for further scaling to reduce tunneling and thus leakage currents. $\endgroup$
    – Jon Custer
    Oct 2, 2014 at 14:42
  • $\begingroup$ @JonCuster So any limit must be there...? $\endgroup$
    – NeilRoy
    Oct 2, 2014 at 14:44
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    $\begingroup$ 0 is a limit (!). However, real materials have a dielectric breakdown limit, i.e. a limit to the voltage gradient supported by the material. If placing one charge on the top plate results in a voltage gradient exceeding the dielectric breakdown than you no longer have a capacitor. Note that as CMOS has scaled down the gate thickness the supply voltage has had to come down as well. $\endgroup$
    – Jon Custer
    Oct 2, 2014 at 14:54
  • $\begingroup$ @JonCuster, you should re-post your comments as an answer. $\endgroup$
    – The Photon
    Oct 2, 2014 at 15:58

1 Answer 1

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0 is a limit (!).

But, kidding aside, gate dielectrics for modern CMOS devices are in the few nanometer thicknesses. Since these are (functionally) capacitors, d can certainly be small. But, high-k dielectrics had to be introduced for further scaling to reduce tunneling and thus leakage currents. The reason is that real materials have a dielectric breakdown limit, i.e. a limit to the voltage gradient supported across the material. If placing one charge on the top plate results in a voltage gradient exceeding the dielectric breakdown than you no longer have a capacitor. Note that as CMOS has scaled down the gate thickness the supply voltage has had to come down as well.

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