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What is the smallest number of Fredkin gates needed to simulate a Toffoli gate? What is the smallest number of Toffoli gates needed to simulate a Fredkin gate?

Where the Toffoli's gate is the CCNOT and the Fredkin gate is CSWAP (controlled swap) (See http://en.wikipedia.org/wiki/Quantum_gate#Commonly_used_gates)

I can create both gates using the other, but i don't know how to prove that I'm using the "smallest" number. (Of course, using auxiliary lines with 0,1 is mandatory, especially using only the Fredkin gate.)

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2 Answers 2

Generally the way you prove something is minimal is by 1) enumerating all possible smaller configurations, or 2) looking at it in terms of a finite set of states, and showing that nothing smaller could hold the necessary number of states.

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And you can often reduce the search space by proving any solutions must at least take on (or not take on) some set of forms. –  Brandon Enright Nov 28 '13 at 1:16
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In both cases the answer is 4 gates.

A solution for this problem can be found in Andrew Landahl's notes for the course Physics 452/581: Introduction to Quantum Information, University of New Mexico. I quote the author's original solution (with some minor corrections).

In both cases, the minimum number of gates required to simulate the other is 4. A proof of such a minimum requires exhaustively demonstrating that 1, 2 or 3 gates is insufficient to achieve the simulation. Such a proof is omitted here and was not required for credit. Unfortunately, intuition seems to be the best alternative to finding the minimum number of gates and the related circuit.

By ``exhaustively demonstrating'' the author means that you can just write a computer program that lists all possible gates that you can obtain by combining 1, 2 and 3 Toffoli/Fredkin gates, and carefully check that none of them corresponds to the gate that you want to synthesize.

Fredkin simulates Toffoli

We first explore some of the features of the Fredkin gate. Generally, we write the gate as

enter image description here

For particular choices of ancilla, we find

  1. FANOUT/NOT

    enter image description here

  2. AND

    enter image description here

In terms of our desired output, we see that the first two inputs are trivially mapped (aside from any possibly FANOUTs needed). The third output requires combining xy with z:

enter image description here

Combining these steps gives the following circuit, (with relevant intermediary outputs labeled):

enter image description here


Toffoli simulates Fredkin

We write the Toffoli gate as

enter image description here

Relevant properties of the Toffoli gate are

  1. FANOUT

    enter image description here

  2. XOR/CNOT

    enter image description here

We also need to recognize that the Fredkin map can be equivalently written as

$$\mathrm{Fred}(x,y,z)= (x, x(y\oplus z)\oplus y, x(y\oplus z)\oplus z)$$

This can be intuitively seen by noticing that if the control bit x is not set, the outputs are unchanged. If x is set, the outputs are swapped using the fabled XOR swap trick. Combining these results, we write the complete circuit (with relevant intermediary ouputs labeled):

enter image description here

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