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In a modern 0.35μm CMOS processor, the gate oxide thickness is around 80Å = 8nm. This gives us a capacitance per unit area of $430nF/cm^2$

I am not getting how one gets this capacitance per unit area. Can anyone explain this? (i.e. how formula are constructed and used.)

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Perhaps electronics.stackexchange.com is a better home? –  Qmechanic Jan 13 '13 at 7:52

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Capacitance of area A, dielectric thickness d is, $$ C=\frac{\epsilon_{0}\epsilon_{r}A}{d} $$ where permittivity of free space is $\epsilon_{0}$=8.85e-12 F/m and the relative permittivity of silicon dioxide SiO2 is $\epsilon_{r}=4.5$ at f=1kHz (Kaye and Laby 14th edition). Put $A=1cm^{2}$, $d=8nm$ and one gets $C=498nF/cm^{2}$. I guess the overestimate is because the relative permittivity is less at higher frequencies typical of ICs.

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